Robust PLLs
With a wide operational range, a single ring oscillator PLL can be used to generate almost any SoC clock from PCIe3 references to Audio CODECs and spread spectrum DDR references
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Serializer – Deserializer IP
Multi-protocol PMAs with the flexibility of an FPGA, and optimized PMAs for low area and low power with ring PLLs running over 25Gbps.
LVDS interfaces
Our Bi-directional LVDS is in production from 90nm to 12nm and available in 7nm and operates over 2Gbps.
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