Silicon Creations’ Fractional-N PLL Technology Leveraged at Israel’s Bar-Ilan University SoC Lab

Lawrenceville, Ga. – October 29, 2018 Silicon Creations, a leading supplier of high-performance analog and mixed-signal intellectual property (IP), today announced that the SoC Lab at Israel’s Bar-Ilan University as part of the HiPer Consortium project has successfully integrated Silicon Creations’ LC and ring PLLs (phase lock loop) intellectual property (IP) in its SoC1 chip implemented in TSMC 28HPC process node.  Read the press release here.

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Silicon Creations is a leading silicon IP developer with offices in the US and Poland. The company is focused on providing world-class silicon intellectual property (IP) for precision and general-purpose timing (PLLs), low power, high-performance SerDes and high-speed differential I/Os. Silicon Creations' IP is proven from 7 to 180-nanometer process technologies. Please visit our products page to learn more about our products. 

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