Custom Circuit Solutions for
High Performance Applications
High Performance Applications
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Selecting a Silicon Creations PLL For Your System
Silicon Creations offers a large selection of PLL architectures, functions, and performance trade-offs which
can make the task of choosing the correct PLL for a given system seem daunting. Fortunately, this task can
be greatly simplified when a few basic guidelines are followed. If after following these guidelines the correct
choice is still not clear, a Silicon Creations expert PLL designer will be happy to help.
Step 1. Determine the right VCO architecture
Silicon Creations currently offers two VCO architectures:
following table gives some general guidelines that apply in most modern processes. Of course, there are
always exceptions to these guidelines so if your system requires a special case, Silicon Creations will be
happy to help develop a custom solution.
In the table below, each column compares the three VCO architectures for a given specification. Start with
the specifications that are most important in your system and then move to less important specifications. As
you move through, some VCO architectures will clearly appear more optimal while others may get eliminated.
If none of the VCO architectures appear optimal for your system, please contact Silicon Creations and an
expert PLL designer will help find a solution.
Note that the numbers given in the previous table are average values for most modern day (130nm-45nm)
processes. The intent is to show the relationship between the various VCO architectures and give rough
estimates of what can be expected for each design.
Step 2. Choose integer or fractional
In an integer based PLL, the minimum frequency step size is equivalent to the reference clock frequency.
Therefore, if a fine frequency step is needed a fractional PLL may be the best solution. Also, if only a single
crystal frequency is available and multiple unrelated output frequencies are needed, then a fractional PLL
provides a nice solution since a single PLL instance can be used and controlled digitally to generate the
desired outputs.
If cost or area are the major concerns, an integer PLL can also be used for fine frequency resolution by
dividing down the reference clock frequency. The problem with this is that to maintain stability the loop
bandwidth must also be lowered resulting in significantly increased phase noise and long term jitter.
However, if short term jitter (period or cycle-to-cycle) is the only concern this may be acceptable.
Silicon Creations uses an advanced delta sigma modulator architecture to generate fractional clocks so
quantization noise is highly attenuated. The only real trade-off of going to fractional mode is slightly
increased area and complexity.
Step 3. Choose accessories
Additional options include:
The accessories needed for a specific PLL are usually obvious from the system requirements and frequency
plan. For example, if the function of the PLL is to de-skew two clock domains then de-skew logic will likely be
needed but spread spectrum clocking will not. If only a 3.3V supply is available in the system or if the core
supply is shared with a large digital block then a voltage regulator may be needed. If the PLL is located in
the IO ring, ESD protection may be needed.
If it is not clear from the system requirements which accessories are necessary, please contact Silicon
Creations and an expert PLL designer will help find a solution.
Still not sure what PLL you need, please fill out as much as possible of the PLL Selection
Form and Silicon Creations will propose a solution.
can make the task of choosing the correct PLL for a given system seem daunting. Fortunately, this task can
be greatly simplified when a few basic guidelines are followed. If after following these guidelines the correct
choice is still not clear, a Silicon Creations expert PLL designer will be happy to help.
Step 1. Determine the right VCO architecture
Silicon Creations currently offers two VCO architectures:
- Ring Oscillator
- Single LC Tank Oscillator
- Multi-Core LC Tank Oscillator
following table gives some general guidelines that apply in most modern processes. Of course, there are
always exceptions to these guidelines so if your system requires a special case, Silicon Creations will be
happy to help develop a custom solution.
In the table below, each column compares the three VCO architectures for a given specification. Start with
the specifications that are most important in your system and then move to less important specifications. As
you move through, some VCO architectures will clearly appear more optimal while others may get eliminated.
If none of the VCO architectures appear optimal for your system, please contact Silicon Creations and an
expert PLL designer will help find a solution.
Note that the numbers given in the previous table are average values for most modern day (130nm-45nm)
processes. The intent is to show the relationship between the various VCO architectures and give rough
estimates of what can be expected for each design.
Step 2. Choose integer or fractional
In an integer based PLL, the minimum frequency step size is equivalent to the reference clock frequency.
Therefore, if a fine frequency step is needed a fractional PLL may be the best solution. Also, if only a single
crystal frequency is available and multiple unrelated output frequencies are needed, then a fractional PLL
provides a nice solution since a single PLL instance can be used and controlled digitally to generate the
desired outputs.
If cost or area are the major concerns, an integer PLL can also be used for fine frequency resolution by
dividing down the reference clock frequency. The problem with this is that to maintain stability the loop
bandwidth must also be lowered resulting in significantly increased phase noise and long term jitter.
However, if short term jitter (period or cycle-to-cycle) is the only concern this may be acceptable.
Silicon Creations uses an advanced delta sigma modulator architecture to generate fractional clocks so
quantization noise is highly attenuated. The only real trade-off of going to fractional mode is slightly
increased area and complexity.
Step 3. Choose accessories
Additional options include:
- Spread Spectrum
- Input/Output Frequency Dividers
- De-skew Logic
- Lock Detection
- Differential Output Clocks
- Voltage Regulator
- ESD
The accessories needed for a specific PLL are usually obvious from the system requirements and frequency
plan. For example, if the function of the PLL is to de-skew two clock domains then de-skew logic will likely be
needed but spread spectrum clocking will not. If only a 3.3V supply is available in the system or if the core
supply is shared with a large digital block then a voltage regulator may be needed. If the PLL is located in
the IO ring, ESD protection may be needed.
If it is not clear from the system requirements which accessories are necessary, please contact Silicon
Creations and an expert PLL designer will help find a solution.
Still not sure what PLL you need, please fill out as much as possible of the PLL Selection
Form and Silicon Creations will propose a solution.
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